EEMBC Publishes Telecom Benchmark Scores for LSI Logic's ZSP 500 DSP Core

EL DORADO HILLS, Calif.--(BUSINESS WIRE)--March 12, 2003--New benchmark scores for the LSI Logic (NYSE: LSI) ZSP(R) 500 DSP core were published today by EEMBC, the Embedded Microprocessor Benchmark Consortium.

Tested by the EEMBC Certification Labs (ECL) in a 325-MHz simulation environment against EEMBC's telecom benchmark suite, the ZSP500 received an out-of-the-box score of 0.02587 Telemarks per MHz. With optimizations performed by LSI Logic, the ZSP500 achieved a Full-Fury score of 0.43206 Telemarks per MHz. These results translate to 8.4 and 140.4 Telemarks, respectively, for the 325-MHz test setup. The Green Hills ZSP Version 3.5.2 compiler was used for both sets of tests.

"These ZSP500 scores demonstrate the enhanced architectural efficiency of the second-generation (ZSP G2) instruction set, which has dramatically improved on the ZSP400 certified scores that LSI Logic released in December 2001," said Markus Levy, EEMBC president. "The out-of-the-box scores indicate the capabilities of the Green Hills Software compiler, while the optimized scores illustrate the benefits of applying straightforward code modifications to take advantage of the ZSP architecture."

Based on the ZSP second-generation G2 superscalar architecture, the ZSP500 features an eight-stage pipeline, scalable program and data paths, and user-configurable memory architecture, enabling clock speeds of up to 400 MHz. The ZSP500 core also allows designers to incorporate customized instructions for target multimedia and communications applications, such as GPRS, CDMA2000, MPEG-4, and WLAN 802.11.

"The challenge in digital signal processor architectures is to keep pace with the market thirst for more performance without large increases in power and cost. The ZSP500 has shown in its EEMBC benchmarks that performance enhancements result from an overall architectural efficiency that translates to less clock cycles for the same operations," stated Tuan Dao, vice president and general manager, ZSP Advanced DSP Products Division, LSI Logic. "These improvements have been coupled with new features for extensible instruction sets and configurable memory subsystems, providing an ability to efficiently address next-generation wireless market requirements. The results demonstrate that the ZSP500 is the highest performing general purpose DSP core in its class."

Detailed EEMBC(R) benchmark score reports on the ZSP500 are available now from the EEMBC Web site at www.eembc.org or direct from the following URLs:

Out-of-the-box

http://www.eembc.org/benchmark/score/ScoreReportWin.asp?BenchmarkS eq=377&CertificationType=OUT

Optimized

http://www.eembc.org/benchmark/score/ScoreReportWin.asp?BenchmarkS eq=378&CertificationType=OPT

For more information on the ZSP500 DSP core, please visit www.zsp.com/zsp500.html.

About EEMBC

EEMBC, the Embedded Microprocessor Benchmark Consortium, develops and certifies real-world benchmarks and benchmark scores to help designers select the right embedded processors for their systems. Every processor submitted for EEMBC(R) benchmarking is tested for parameters representing different workloads and capabilities in communications, networking, consumer, office automation, automotive/industrial, embedded Java, and microcontroller-related applications. With members including leading semiconductor, intellectual property, and compiler companies, EEMBC establishes benchmark standards and provides certified benchmarking results through the EEMBC Certification Labs (ECL) in Texas and California.

EEMBC members include 3DSP, Altera, AMD, Aplix, ARC International, ARM, ChipWrights, Equator Technologies, esmertec, Fujitsu Microelectronics, Green Hills Software, Hitachi America Ltd., IAR, IBM Corp., Imagination Technologies, Improv Systems, Infineon Technologies, Insignia, Intel, Intrinsity, LSI Logic, Matsushita Electric Industrial, Mentor Graphics, MIPS Technologies Inc., Mitsubishi Electric, Motorola, National Semiconductor, NEC Electronics America, Oki Semiconductor, ParthusCeva, Philips Semiconductors, PMC-Sierra, Precise, Red Hat, Samsung, SandCraft, STMicroelectronics, Siroyan Ltd., StarCore, Sun Microsystems, SuperH, Symbian, Tao Group, Tensilica, Texas Instruments, Toshiba, Wind River Systems, Xilinx, and Zucotto Wireless.

EEMBC is a registered trademark of the Embedded Microprocessor Benchmark Consortium. All other trademarks appearing herein are the property of their respective owners.

CONTACT: EEMBC
             Markus Levy, 530/672-9113 (voice)
             530/672-9103 (fax)
             markus@eembc.org
                   or
             Wall Street Communications
             Bob Decker, 415/409-0233 (voice)
             650/618-1512 (fax)
             bob.decker@wallstcom.com